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path: root/electronics/cw2/final.asm
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init: 
	clrf    PORTA         ; make sure port A output latches are low 
	clrf    PORTB         ; make sure port B output latches are low 
	bsf     STATUS,RP0    ; select memory bank 1 
	movlw 	b'11111111'   ; set port A data direction to inputs 
	movwf 	TRISA          
	movlw 	b'00000000'   ; set port B data direction to outputs 
	movwf 	TRISB        
	bcf     STATUS,RP0    ; select memory bank 0 
	BACK 	equ B4
	goto    main 

volow:
	movlw	b'00000001'
	movwf	PORTB
	goto 	main
vomid:
	movlw	b'00000011'
	movwf	PORTB
	goto 	main
vohigh:
	movlw	b'00000111'
	movwf	PORTB
	goto 	main
vovhigh:
	movlw	b'00001111'
	movwf	PORTB
	goto 	main


convert:
	andlw	b'00001111'
	movwf	BACK

	andlw   b'00001100'
	btfsc 	STATUS, Z
	goto 	volow
	movf 	BACK, W

	andlw 	b'00001100'
	sublw	b'00000100'
	btfsc 	STATUS, Z
	goto 	vomid	
	movf 	BACK, W

	andlw   b'00001100'
	sublw	b'00001000'
	btfsc 	STATUS, Z
	goto  	vohigh	
	movf 	BACK, W

	andlw   b'00001100'
	sublw	b'00001100'
	btfsc 	STATUS, Z
	goto  	vovhigh	
	movf 	BACK, W
	
	goto 	main

main:
	call 	readadc0
	movf	B0, W

	goto 	convert

	goto 	main

	end